Introduction
Von Neumann architecture - Technologies for building processors and memories
Assembler
Instruction Set Architecture (ISA) - Machine language - Assembly language - MIPS Assembly language - Intel Assembly language (introduction).
Combinational logic
Truth tables and combinational circuits - Gates - Boolean Algebra - Logic functions and canonical forms - PLA and ROM implementation - Examples: encoder, decoder, multiplexor, adder, Arithmetic Logic Unit (ALU)
Sequential logic
Flip-Flops and latches - Clocking methodology - Finite state machines (Moore machine and Mealy machine) - Implementation
Memory elements
Registers - Register file - Memory typologies - SRAM - DRAM
The processor: datapath and control
Single-cycle implementation (datapath and control unit) - Multi-cycle implementation - Microprogramming - Exception - Performance evaluation
Pipelining
Pipelined datapath and pipelined control - Structural hazards - Data hazards, stalls and forwarding - Control hazards, delayed branch, static and dynamic branch prediction - Performance evaluation with hazards - Advanced pipelining: static and dynamic multiple-issue (introduction).
Memory hierarchy
Principle of locality - Cache memory (direct-mapped cache, set-associative cache, multilevel cache) - Hit/miss rate - Miss penalty - Accessing a cache (write-through and write-back) - Performance evaluation - Introduction to virtual memory
Input/Output
I/O devices management